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(Rev. 1.1)
MITSUBISHI LSIs
M5M467400/465400BJ,BTP -5,-6,-5S,-6S M5M467800/465800BJ,BTP -5,-6,-5S,-6S M5M465160BJ,BTP -5,-6,-5S,-6S
FAST PAGE MODE 67108864-BIT (16777216-WORD BY 4-BIT) DYNAMIC RAM FAST PAGE MODE 67108864-BIT (8388608-WORD BY 8-BIT) DYNAMIC RAM FAST PAGE MODE 67108864-BIT (4194304-WORD BY 16-BIT) DYNAMIC RAM
DESCRIPTION
The M5M467400/465400BJ,BTP is organized 16777216-word by 4-bit, M5M467800/465800BJ,BTP is organized 8388608-word by 8-bit, and M5M465160BJ,BTP is organized 4194304-word by 16-bit dynamic RAMs, fabricated with the high performance CMOS process, and are suitable for large-capacity memory systems with high speed and low power dissipation. The use of double-layer aluminum process combined with CMOS technology and a single-transistor dynamic storage stacked capacitor cell provide high circuit density. Multiplexed address inputs permit both a reduction in pins and an increase in system densities.
FEATURES
Type name M5M467400BXX-5,5S M5M467800BXX-5,5S M5M467400BXX-6,6S M5M467800BXX-6,6S M5M465400BXX-5,5S M5M465800BXX-5,5S M5M465400BXX-6,6S M5M465800BXX-6,6S Address Power RAS OE CAS Cycle access access access access dissipatime tion time time time time (max.ns) (max.ns) (max.ns) (max.ns) (min.ns) (typ.mW) Type name M5M465160BXX-5,5S M5M465160BXX-6,6S Power Address RAS CAS OE Cycle dissipaaccess access access access time time tion time time time (max.ns) (max.ns) (max.ns) (max.ns) (min.ns) (typ.mW)
50 60 50 60
13 15 13 15
25 30 25 30
13 15 13 15
90 110 90 110
300 250 390 325
50 60
13 15
25 30
13 15
90 110
420 390
XX=J,TP
Standard 32 pin SOJ, 32 pin TSOP (M5M467400Bxx/M5M465400Bxx/M5M467800Bxx/M5M465800Bxx) Standard 50 pin SOJ, 50 pin TSOP (M5M465160Bxx) Single 3.3 0.3V supply Low stand-by power dissipation 1.8mW (Max) LVCMOS input level Low operating power dissipation M5M467400Bxx-5,5S / M5M467800Bxx-5,5S 360.0mW (Max) M5M467400Bxx-6,6S / M5M467800Bxx-6,6S 324.0mW (Max) M5M465400Bxx-5,5S / M5M465800Bxx-5,5S 468.0mW (Max) M5M465400Bxx-6,6S / M5M465800Bxx-6,6S 432.0mW (Max) M5M465160Bxx-5,5S 504.0mW (Max) M5M465160Bxx-6,6S 468.0mW (Max) Self refresh capability* Self refresh current 400A (Max) Fast-page mode , Read-modify-write, CAS before RAS refresh, Hidden refresh capabilities Early-write mode and OE to control output buffer impedance All inputs, outputs LVTTL compatible and low capacitance * :Applicable to self refresh version(M5M467400/465400/467800/465800/465160BJ,BTP-5S,-6S:option) only
ADDRESS
Part No.
Row Add Col Add
Refresh
Refresh Cycle Normal S-version
RAS Only Ref,Normal R/W 8192/64ms 8192/128ms
M5M467400Bxx A0-A12 A0-A10
CBR Ref,Hidden Ref
4096/64ms 4096/128ms
M5M465400Bxx A0-A11 A0-A11 RAS Only Ref,Normal R/W 4096/64ms 4096/128ms CBR Ref,Hidden Ref
RAS Only Ref,Normal R/W 8192/64ms 8192/128ms
M5M467800Bxx A0-A12 A0-A9
CBR Ref,Hidden Ref
4096/64ms 4096/128ms
M5M465800Bxx A0-A11 A0-A10 RAS Only Ref,Normal R/W 4096/64ms 4096/128ms CBR Ref,Hidden Ref M5M465160Bxx A0-A11 A0-A9
RAS Only Ref,Normal R/W 4096/64ms 4096/128ms CBR Ref,Hidden Ref
APPLICATION
Main memory unit for computers, Microcomputer memory, Refresh memory for CRT
1
MITSUBISHI ELECTRIC
Jun. 1999
(Rev. 1.1)
MITSUBISHI LSIs
M5M467400/465400BJ,BTP -5,-6,-5S,-6S M5M467800/465800BJ,BTP -5,-6,-5S,-6S M5M465160BJ,BTP -5,-6,-5S,-6S
FAST PAGE MODE 67108864-BIT (16777216-WORD BY 4-BIT) DYNAMIC RAM FAST PAGE MODE 67108864-BIT (8388608-WORD BY 8-BIT) DYNAMIC RAM FAST PAGE MODE 67108864-BIT (4194304-WORD BY 16-BIT) DYNAMIC RAM
PIN DESCRIPTION
M5M467400Bxx / M5M465400Bxx Pin Name A0-A12 DQ1-DQ4 RAS CAS W OE Vcc Vss NC Function Address Inputs Data Inputs / Outputs Row Address Strobe Input Column Address Strobe Input Write Control Input Output Enable Input Power Supply (+3.3V) Ground (0V) No Connection M5M467800Bxx / M5M465800Bxx Pin Name A0-A12 DQ1-DQ8 RAS CAS W OE Vcc Vss NC Function Address Inputs Data Inputs / Outputs Row Address Strobe Input Column Address Strobe Input Write Control Input Output Enable Input Power Supply (+3.3V) Ground (0V) No Connection
M5M465160Bxx Pin Name A0-A11 Function Address Inputs
DQ1-DQ16 Data Inputs / Outputs Row Address Strobe Input RAS Upper byte control UCAS Column Address Strobe Input Lower byte control LCAS Column Address Strobe Input Write Control Input W OE Vcc Vss NC Output Enable Input Power Supply (+3.3V) Ground (0V) No Connection
XX=BJ,BTP
M5M467400/465400BJ,BTP
PIN CONFIGURATION (TOP VIEW)
Vcc DQ1 DQ2 NC NC NC NC W RAS A0 A1 A2 A3 A4 A5 Vcc
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16
32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17
Vss DQ4 DQ3 NC NC NC CAS OE A12/NC(Note) A11 A10 A9 A8 A7 A6 Vss
Vcc DQ1 DQ2 NC NC NC NC W RAS A0 A1 A2 A3 A4 A5 Vcc
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16
32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17
Vss DQ4 DQ3 NC NC NC CAS OE A12/NC(Note) A11 A10 A9 A8 A7 A6 Vss
Outline 32P0N (400mil SOJ)
M5M465400BJ
M5M467400BJ
Outline 32P3N (400mil TSOP Normal Bend)
Note : A12...M5M467400Bxx, NC...M5M465400Bxx : NO CONNECTION NC
M5M465400BTP
M5M467400BTP
2
MITSUBISHI ELECTRIC
Jun. 1999
(Rev. 1.1)
MITSUBISHI LSIs
M5M467400/465400BJ,BTP -5,-6,-5S,-6S M5M467800/465800BJ,BTP -5,-6,-5S,-6S M5M465160BJ,BTP -5,-6,-5S,-6S
FAST PAGE MODE 67108864-BIT (16777216-WORD BY 4-BIT) DYNAMIC RAM FAST PAGE MODE 67108864-BIT (8388608-WORD BY 8-BIT) DYNAMIC RAM FAST PAGE MODE 67108864-BIT (4194304-WORD BY 16-BIT) DYNAMIC RAM
M5M467800/465800BJ,BTP
Vcc DQ1 DQ2 DQ3 DQ4 NC Vcc W RAS A0 A1 A2 A3 A4 A5 Vcc
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17
PIN CONFIGURATION (TOP VIEW)
Vss DQ8 DQ7 DQ6 DQ5 Vss CAS OE A12/NC(Note) A11 A10 A9 A8 A7 A6 Vss Vcc DQ1 DQ2 DQ3 DQ4 NC Vcc W RAS A0 A1 A2 A3 A4 A5 Vcc
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17
Vss DQ8 DQ7 DQ6 DQ5 Vss CAS OE A12/NC(Note) A11 A10 A9 A8 A7 A6 Vss
Outline 32P0N (400mil SOJ)
M5M465160BJ,BTP
Vcc DQ1 DQ2 DQ3 DQ4 Vcc DQ5 DQ6 DQ7 DQ8 NC Vcc W RAS NC NC NC NC A0 A1 A2 A3 A4 A5 Vcc
1 2 3 4 5 6 7 8 9 10 50 49 48 47 46 45 44 43 42 41
M5M465800BJ
11 12 12 13 14 15 16 17 18 19 20 21 22 23 24 25
Outline 50P0G (400mil SOJ)
M5M467800BJ M5M465160BJ
Outline 32P3N (400mil TSOP Normal Bend)
Note : A12...M5M467800Bxx, NC...M5M465800Bxx : NO CONNECTION NC
PIN CONFIGURATION (TOP VIEW)
Vss DQ16 DQ15 DQ14 DQ13 Vss DQ12 DQ11 DQ10 DQ9 NC Vss LCAS UCAS OE NC NC NC A11 A10 A9 A8 A7 A6 Vss Vcc DQ1 DQ2 DQ3 DQ4 Vcc DQ5 DQ6 DQ7 DQ8 NC Vcc W RAS NC NC NC NC A0 A1 A2 A3 A4 A5 Vcc
1 2 3 4 5 6 7 8 9 10 11 12 12 13 14 15 16 17 18 19 20 21 22 23 24 25 50 49 48 47 46 45 44 43 42 41
M5M465800BTP M5M465160BTP
M5M467800BTP
Vss DQ16 DQ15 DQ14 DQ13 Vss DQ12 DQ11 DQ10 DQ9 NC Vss LCAS UCAS OE NC NC NC A11 A10 A9 A8 A7 A6 Vss
40 39 38 37 36 35 34 33 32 31 30 29 28 27 26
40 39 38 37 36 35 34 33 32 31 30 29 28 27 26
Outline 50P3G (400mil TSOP Normal Bend)
NC : NO CONNECTION
3
MITSUBISHI ELECTRIC
Jun. 1999
(Rev. 1.1)
MITSUBISHI LSIs
M5M467400/465400BJ,BTP -5,-6,-5S,-6S M5M467800/465800BJ,BTP -5,-6,-5S,-6S M5M465160BJ,BTP -5,-6,-5S,-6S
FAST PAGE MODE 67108864-BIT (16777216-WORD BY 4-BIT) DYNAMIC RAM FAST PAGE MODE 67108864-BIT (8388608-WORD BY 8-BIT) DYNAMIC RAM FAST PAGE MODE 67108864-BIT (4194304-WORD BY 16-BIT) DYNAMIC RAM
FUNCTION
The M5M467400(800)/465400(800,160)BJ, BTP provide, in addition to normal read, write, and read-modify-write operations, a number of other functions, e.g., Fast page mode, CAS before RAS refresh, and delayed-write. The input conditions for each are shown in Table 1.
Table 1 Input conditions for each mode
M5M467400Bxx / M5M465400Bxx / M5M467800Bxx / M5M465800Bxx
Inputs Operation RAS Read Write (Early write) Write (Delayed write) Read-modify-write RAS-only refresh Hidden refresh CAS before RAS refresh Standby ACT ACT ACT ACT ACT ACT ACT NAC CAS ACT ACT ACT ACT NAC ACT ACT DNC W NAC ACT ACT ACT DNC DNC NAC DNC OE ACT DNC DNC ACT DNC ACT DNC DNC Row address APD APD APD APD APD DNC DNC DNC Column address APD APD APD APD DNC DNC DNC DNC Input/Output Refresh Input OPN VLD VLD VLD OPN OPN DNC DNC Output VLD OPN IVD VLD OPN VLD OPN OPN NO NO NO NO YES YES YES NO FAST PAGE mode identical Remark
M5M465160Bxx
Inputs Operation RAS Lower byte read Upper byte read Word read Lower byte write Upper byte write Word write RAS-only refresh Hidden refresh CAS before RAS refresh Stand-by ACT ACT ACT ACT ACT ACT ACT ACT ACT NAC LCAS ACT NAC ACT ACT NAC ACT NAC ACT ACT DNC UCAS NAC ACT ACT NAC ACT ACT NAC ACT ACT DNC W NAC NAC NAC ACT ACT ACT DNC NAC DNC DNC OE ACT ACT ACT NAC NAC NAC DNC ACT DNC DNC Row address APD APD APD APD APD APD APD DNC DNC DNC Column address APD APD APD APD APD APD DNC DNC DNC DNC Input/Output DQ1~DQ8 VLD OPN VLD DIN DNC DIN OPN VLD OPN OPN DQ9~DQ16 OPN VLD VLD DNC DIN DIN OPN VLD OPN OPN Refresh NO NO NO NO NO NO YES YES YES NO FAST PAGE mode identical Remark
Note : ACT : active, NAC : nonactive, DNC : don' t care, VLD : valid, IVD : Invalid, APD : applied, OPN : open
4
MITSUBISHI ELECTRIC
Jun. 1999
(Rev. 1.1)
MITSUBISHI LSIs
M5M467400/465400BJ,BTP -5,-6,-5S,-6S M5M467800/465800BJ,BTP -5,-6,-5S,-6S M5M465160BJ,BTP -5,-6,-5S,-6S
FAST PAGE MODE 67108864-BIT (16777216-WORD BY 4-BIT) DYNAMIC RAM FAST PAGE MODE 67108864-BIT (8388608-WORD BY 8-BIT) DYNAMIC RAM FAST PAGE MODE 67108864-BIT (4194304-WORD BY 16-BIT) DYNAMIC RAM
M5M467400Bxx / M5M465400Bxx BLOCK DIAGRAM
COLUMN ADDRESS STROBE INPUT ROW ADDRESS STROBE INPUT WRITE CONTROL INPUT Vcc (3.3V) CAS RAS CLOCK GENERATOR CIRCUIT Vss (0V)
W (4) DATA IN BUFFERS A0~A11 (Note)
A0 A1 A2 ROW & COLUMN ADDRESS BUFFER A3 A4 A5 ADDRESS INPUTS A6 A7 A8 A9 A10 A11 A12 (Note) Note
COLUMN DECODER
SENSE REFRESH AMPLIFIER & I /O CONTROL ROW DECODER
DQ1 DQ2 DQ3 (4) DATA OUT BUFFERS DQ4 DATA INPUTS / OUTPUTS
A0~ A12 (Note)
MEMORY CELL (67108864 BITS)
OE OUTPUT ENABLE INPUT
:
Refer to Page 1 (ADDRESS)
M5M467800Bxx / M5M465800Bxx BLOCK DIAGRAM
COLUMN ADDRESS STROBE INPUT ROW ADDRESS STROBE INPUT WRITE CONTROL INPUT Vcc (3.3V) CAS RAS CLOCK GENERATOR CIRCUIT Vss (0V)
W (8) DATA IN BUFFERS A0~A10 A0 A1 A2 ROW & COLUMN ADDRESS BUFFER A3 A4 A5 SENSE REFRESH AMPLIFIER & I /O CONTROL ROW DECODER (Note) COLUMN DECODER
DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 DQ8 DATA INPUTS / OUTPUTS
A6 A7 A8 A9 A10 A11 A12 (Note)
A0~ A12 (Note)
MEMORY CELL (67108864 BITS)
(8) DATA OUT BUFFERS
ADDRESS INPUTS
OE OUTPUT ENABLE INPUT Note
:
Refer to Page 1 (ADDRESS)
5
MITSUBISHI ELECTRIC
Jun. 1999
(Rev. 1.1)
MITSUBISHI LSIs
M5M467400/465400BJ,BTP -5,-6,-5S,-6S M5M467800/465800BJ,BTP -5,-6,-5S,-6S M5M465160BJ,BTP -5,-6,-5S,-6S
FAST PAGE MODE 67108864-BIT (16777216-WORD BY 4-BIT) DYNAMIC RAM FAST PAGE MODE 67108864-BIT (8388608-WORD BY 8-BIT) DYNAMIC RAM FAST PAGE MODE 67108864-BIT (4194304-WORD BY 16-BIT) DYNAMIC RAM
M5M465160Bxx BLOCK DIAGRAM
ROW ADDRESS RAS STROBE INPUT LOWER BYTE CONTROL LCAS COLUMN ADDRESS STROBE INPUT UPPER BYTE CONTROL UCAS COLUMN ADDRESS STROBE INPUT WRITE CONTROL INPUT W
CLOCK GENERATOR CIRCUIT (8)LOWER
VCC (3.3V) VSS (0V) LOWER UPPER
BUFFERS DATA IN
DQ1 DQ2 LOWER DATA INPUTS / OUTPUTS DQ8
DATA OUT DATA IN
(8)LOWER
A0~A9 A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 A11 COLUMN DECODER
BUFFERS (8)UPPER
BUFFERS
ADDRESS BUFFER
ROW & COLUMN
SENSE REFRESH AMPLIFIER & I /O CONTROL
DQ9 DQ10 UPPER DATA INPUTS / OUTPUTS DQ16
ROW DECODER
A0 ~ A11
MEMORY CELL (67108864BITS)
BUFFERS
(8)UPPER
ADDRESS INPUTS
DATA OUT
OE OUTPUT ENABLE INPUT
6
MITSUBISHI ELECTRIC
Jun. 1999
(Rev. 1.1)
MITSUBISHI LSIs
M5M467400/465400BJ,BTP -5,-6,-5S,-6S M5M467800/465800BJ,BTP -5,-6,-5S,-6S M5M465160BJ,BTP -5,-6,-5S,-6S
FAST PAGE MODE 67108864-BIT (16777216-WORD BY 4-BIT) DYNAMIC RAM FAST PAGE MODE 67108864-BIT (8388608-WORD BY 8-BIT) DYNAMIC RAM FAST PAGE MODE 67108864-BIT (4194304-WORD BY 16-BIT) DYNAMIC RAM
ABSOLUTE MAXIMUM RATINGS
Symbol Vcc VI V0 I0 Pd Topr Tstg Supply voltage Input voltage Output voltage Output current Power dissipation Operating temperature Storage temperature Ta=25 C 0 With respect to Vss Parameter Conditions Ratings Unit V V V mA mW C C
~ 4.6 -0.5 ~ 4.6 -0.5 ~ 4.6
-0.5 50 1000
~ 70 -65 ~ 150 ~ 70 C, unless
Nom 3.3 0 Max 3.6 0 Vcc+0.3 0.8
RECOMMENDED OPERATING CONDITIONS
Symbol Vcc Vss VIH VIL Supply voltage Supply voltage High-level input voltage, all inputs Low-level input voltage, all inputs Parameter
(Ta=0
otherwise noted) (Note 1) Unit V V V V
Limits Min 3.0 0 2.0 -0.3
Note 1 : All voltage values are with respect to Vss.
ELECTRICAL CHARACTERISTICS [M5M467400B / M5M467800B]
Symbol VOH VOL IOZ II ICC1 (AV) Parameter High-level output voltage Low-level output voltage Off-state output current Input current Average supply current from Vcc operating (Note 3,4,5)
(Ta=0
~ 70 C , Vcc=3.3 0.3V, Vss=0V, unless
otherwise noted) (Note 2)
Test conditions IOH=-2mA IOL=2mA Q floating 0V VOUT M5M467400B-5,5S M5M467800B-5,5S M5M467400B-6,6S M5M467800B-6,6S M5M467400B-5,5S -6,6S M5M467800B-5,5S -6,6S M5M467400B-5,6 M5M467800B-5,6 M5M467400B-5S,6S M5M467800B-5S,6S M5M467400B-5,5S M5M467800B-5,5S M5M467400B-6,6S M5M467800B-6,6S M5M467400B-5,5S M5M467800B-5,5S M5M467400B-6,6S M5M467800B-6,6S
Limits Min 2.4 0 Typ Max Vcc 0.4 10 10 100
Unit V V
0VVIN Vcc+0.3V, Other input pins=0V
Vcc
-10 -10
A A
mA
RAS, CAS cycling tRC=tWC=min. output open
90
RAS= CAS =VIH, output open
1 mA 0.5
ICC2 (AV)
Average supply current from Vcc (Note 6) stand-by
RAS= CAS Vcc -0.2V,output open 0.3 RAS=VIL, CAS cycling tPC=min. output open CAS before RAS refresh cycling tRC=min. output open 100 mA 90 130 mA 120
ICC4 (AV)
Average supply current from Vcc Fast-Page-Mode (Note 3,4,5) Average supply current from Vcc CAS before RAS refresh (Note 3,5) mode
ICC6 (AV)
Note 2: Current flowing into an IC is positive, out is negative. 3: Icc1 (AV) , Icc4 (AV) and Icc6 (AV) are dependent on cycle rate. Maximum current is measured at the fastest cycle rate. 4: Icc1 (AV) and Icc4 (AV) are dependent on output loading. Specified values are obtained with the output open. 5: Column Address can be changed once or less while RAS=VIL and CAS=VIH.
7
MITSUBISHI ELECTRIC
Jun. 1999
(Rev. 1.1)
MITSUBISHI LSIs
M5M467400/465400BJ,BTP -5,-6,-5S,-6S M5M467800/465800BJ,BTP -5,-6,-5S,-6S M5M465160BJ,BTP -5,-6,-5S,-6S
FAST PAGE MODE 67108864-BIT (16777216-WORD BY 4-BIT) DYNAMIC RAM FAST PAGE MODE 67108864-BIT (8388608-WORD BY 8-BIT) DYNAMIC RAM FAST PAGE MODE 67108864-BIT (4194304-WORD BY 16-BIT) DYNAMIC RAM
ELECTRICAL CHARACTERISTICS [M5M465400B / M5M465800B]
Symbol VOH VOL IOZ II ICC1 (AV) Parameter High-level output voltage Low-level output voltage Off-state output current Input current Average supply current from Vcc operating (Note 3,4,5) M5M465400B-5,5S M5M465800B-5,5S M5M465400B-6,6S M5M465800B-6,6S M5M465400B-5,5S -6,6S M5M465800B-5,5S -6,6S IOH=-2mA IOL=2mA Q floating 0V VOUT (Ta=0
~ 70 C, Vcc=3.3 0.3V, Vss=0V, unless
Test conditions
otherwise noted) (Note 2)
Limits Min 2.4 0 Typ Max Vcc 0.4 10 10 130
Unit V V
0VVIN Vcc+0.3V, Other input pins=0V
Vcc
-10 -10
A A
mA
RAS, CAS cycling tRC=tWC=min. output open
120
RAS= CAS =VIH, output open
1 mA 0.5 0.3 100 mA 90 130 mA 120
ICC2 (AV)
Average supply current from Vcc (Note 6) stand-by
ICC4 (AV)
Average supply current from Vcc Fast-Page-Mode (Note 3,4,5) Average supply current from Vcc CAS before RAS refresh (Note 3,5) mode
M5M465400B-5,6 M5M465800B-5,6 RAS= CAS Vcc -0.2V,output open M5M465400B-5S,6S M5M465800B-5S,6S M5M465400B-5,5S RAS=VIL, CAS cycling M5M465800B-5,5S tPC=min. M5M465400B-6,6S output open M5M465800B-6,6S M5M465400B-5,5S M5M465800B-5,5S M5M465400B-6,6S M5M465800B-6,6S CAS before RAS refresh cycling tRC=min. output open
ICC6 (AV)
[M5M465160B]
Symbol VOH VOL IOZ II ICC1 (AV) Parameter High-level output voltage Low-level output voltage Off-state output current Input current Average supply current M5M465160B-5,5S from Vcc (Note 3,4,5) M5M465160B-6,6S operating Average supply current from Vcc (Note 6) stand-by M5M465160B-5,5S -6,6S M5M465160B-5,6 M5M465160B-5S,6S IOH=-2mA IOL=2mA Q floating 0V VOUT Vcc
0V
Test conditions
Limits Min 2.4 0 -10 -10 Typ Max Vcc 0.4 10 10 140 130 1 0.5 0.3 105 95 140
Unit V V
VIN
Vcc+0.3V, Other input pins=0V
A A
mA
RAS, CAS cycling tRC=tWC=min. output open RAS= CAS =VIH, output open RAS= CAS Vcc -0.2V, output open RAS=VIL, CAS cycling tPC=min. output open CAS before RAS refresh cycling tRC=min. output open
ICC2 (AV)
mA
ICC4 (AV)
Average supply current M5M465160B-5,5S from Vcc Fast-Page-Mode (Note 3,4,5) M5M465160B-6,6S Average supply current from Vcc CAS before RAS refresh (Note 3,5) mode M5M465160B-5,5S M5M465160B-6,6S
mA
ICC6 (AV)
mA 130
8
MITSUBISHI ELECTRIC
Jun. 1999
(Rev. 1.1)
MITSUBISHI LSIs
M5M467400/465400BJ,BTP -5,-6,-5S,-6S M5M467800/465800BJ,BTP -5,-6,-5S,-6S M5M465160BJ,BTP -5,-6,-5S,-6S
FAST PAGE MODE 67108864-BIT (16777216-WORD BY 4-BIT) DYNAMIC RAM FAST PAGE MODE 67108864-BIT (8388608-WORD BY 8-BIT) DYNAMIC RAM FAST PAGE MODE 67108864-BIT (4194304-WORD BY 16-BIT) DYNAMIC RAM
CAPACITANCE
Symbol CI (A) CI (OE) CI (W) CI (RAS) CI (CAS) CI / O (Ta=0
~ 70 C , Vcc=3.3 0.3V, Vss=0V, unless
Parameter
otherwise noted) Test conditions Limits Min Typ Max 5 7 7 7 7 7 Unit pF pF pF pF pF pF
Input capacitance,address inputs Input capacitance, OE input Input capacitance, write control input Input capacitance, RAS input Input capacitance, CAS input Input/Output capacitance, data ports VI=Vss f=1MHZ Vi=25mVrms
SWITCHING CHARACTERISTICS
(Ta=0 ~ 70 C , Vcc=3.3 0.3V, Vss=0V, unless otherwise noted , see notes 6,13,14) Limits
Symbol
Parameter
M5M46X400B-5,5S M5M46X400B-6,6S M5M46X800B-5,5S M5M46X800B-6,6S M5M465160B-5,5S M5M465160B-6,6S Min Max 13 50 25 30 13 5 0 0 13 13 5 0 0 15 15 Min Max 15 60 30 35 15
Unit
tCAC tRAC tAA tCPA tOEA tCLZ tOFF tOEZ
Access time from CAS Access time from RAS Column address access time Access time from CAS precharge Access time from OE Output low impedance time from CAS low Output disable time after CAS high Output disable time after OE high
(Note 7,8) (Note 7,9) (Note 7,10) (Note 7,11) (Note 7) (Note 7) (Note 12) (Note 12)
ns ns ns ns ns ns ns ns
Note 6: An initial pause of 500s is required after power-up followed by a minimum of eight initialization cycles (any combination of cycles containing RAS-only refresh or CAS before RAS refresh). Note the RAS may be cycled during the initial pause. And any eight initialization cycles are required after prolonged periods (greater than 64 ms) of RAS inactivity before proper device operation is achieved. 7: Measured with a load circuit equivalent to VOH=2.4V(IOH=-2mA) / VOL=0.4V(IOL=2mA) loads and 100pF. The reference levels for measuring of output signals are VOH=2.0V and VOL=0.8V. 8: Assumes that tRCD tRCD(max) and tASC tASC(max) and tCP tCP(max). 9: Assumes that tRCD tRCD(max) and tRAD tRAD(max). If tRCD or tRAD is greater than the maximum recommended value shown in this table, tRAC will increase by amount that tRCD exceeds the value shown. 10: Assumes that tRAD tRAD(max) and tASC tASC(max). 11: Assumes that tCP tCP(max) and tASC tASC(max). 12: tOFF(max) and tOEZ(max) defines the time at which the output achieves the high impedance state (IOUT 10 A) and is not reference to VOH(min) or VOL(max).
9
MITSUBISHI ELECTRIC
Jun. 1999
(Rev. 1.1)
MITSUBISHI LSIs
M5M467400/465400BJ,BTP -5,-6,-5S,-6S M5M467800/465800BJ,BTP -5,-6,-5S,-6S M5M465160BJ,BTP -5,-6,-5S,-6S
FAST PAGE MODE 67108864-BIT (16777216-WORD BY 4-BIT) DYNAMIC RAM FAST PAGE MODE 67108864-BIT (8388608-WORD BY 8-BIT) DYNAMIC RAM FAST PAGE MODE 67108864-BIT (4194304-WORD BY 16-BIT) DYNAMIC RAM
TIMING REQUIREMENTS (For Read, Write, Read-Modify-Write ,Refresh, and Fast-Page Mode Cycles)
(Ta=0 ~ 70 C , Vcc=3.3 0.3V, Vss=0V, unless otherwise noted See notes 13,14) Limits M5M46X400B-5,5S M5M46X400B-6,6S Unit M5M46X800B-5,5S M5M46X800B-6,6S M5M465160B-5,5S M5M465160B-6,6S Min tREF tREF tRP tRCD tCRP tRPC tCPN tRAD tASR tASC tRAH tCAH tDZC tDZO tCDD tODD tT Refresh cycle time Refresh cycle time (S-version only) RAS high pulse width Delay time, RAS low to CAS low Delay time, CAS high to RAS low Delay time, RAS high to CAS low CAS high pulse width
Column address delay time from RAS low
Symbol
Parameter
Max 64 128
Min
Max 64 128 ms ms ns 45 ns ns ns ns 30 10 ns ns ns ns ns ns ns ns 50 ns ns
30 (Note15) 18 5 0 8 (Note16) (Note17) 13 0 0 8 13 (Note18) (Note18) (Note19) (Note19) (Note20) 0 0 13 13 1 50 7 25 37
40 20 10 0 10 15 0 0 10 15 0 0 15 15 1
Row address setup time before RAS low
Column address setup time before CAS low
Row address hold time after RAS low Column address hold time after CAS low Delay time, data to CAS low Delay time, data to OE low Delay time, CAS high to data Delay time, OE high to data Transition time
Note 13: The timing requirements are assumed tT =5ns. 14: VIH(min) and VIL(max) are reference levels for measuring timing of input signals. VIH(min) and VIL(max) of the switching characteristics are 2.0V and 0.8V respectively. 15: tRCD(max) is specified as a reference point only. If tRCD is less than tRCD(max), access time is tRAC. If tRCD is greater than tRCD(max), access time is controlled exclusively by tCAC or tAA. tRCD(min) is specified as tRCD(min) =tRAH(min) +2tT+tASC(min). 16: tRAD(max) is specified as a reference point only. If tRAD tRAD(max) and tASC tASC(max), access time is controlled exclusively by tAA. 17: tASC(max) is specified as a reference point only. If tRCD tRCD(max) and tASC tASC(max), access time is controlled exclusively by tCAC. 18: Either tDZC or tDZO must be satisfied. 19: Either tCDD or tODD must be satisfied. 20: tT is measured between VIH(min) and VIL(max).
Read and Refresh Cycles
Symbol Parameter Limits M5M46X400B-5,5S M5M46X400B-6,6S M5M46X800B-5,5S M5M46X800B-6,6S M5M465160B-5,5S M5M465160B-6,6S Min tRC tRAS tCAS tCSH tRSH tRCS tRCH tRRH tRAL tOCH tORH Read cycle time RAS low pulse width CAS low pulse width CAS hold time after RAS low RAS hold time after CAS low Read Setup time before CAS low Read hold time after CAS high Read hold time after RAS high Column address to RAS hold time CAS hold time after OE low RAS hold time after OE low (Note 21) (Note 21) 90 50 13 50 13 0 0 10 25 13 13 10000 10000 Max Min 110 60 15 60 15 0 0 10 30 15 15 10000 10000 Max ns ns ns ns ns ns ns ns ns ns ns Unit
Note 21: Either tRCH or tRRH must be satisfied for a read cycle.
10
MITSUBISHI ELECTRIC
Jun. 1999
(Rev. 1.1)
MITSUBISHI LSIs
M5M467400/465400BJ,BTP -5,-6,-5S,-6S M5M467800/465800BJ,BTP -5,-6,-5S,-6S M5M465160BJ,BTP -5,-6,-5S,-6S
FAST PAGE MODE 67108864-BIT (16777216-WORD BY 4-BIT) DYNAMIC RAM FAST PAGE MODE 67108864-BIT (8388608-WORD BY 8-BIT) DYNAMIC RAM FAST PAGE MODE 67108864-BIT (4194304-WORD BY 16-BIT) DYNAMIC RAM
Write Cycle (Early Write and Delayed Write)
Limits M5M46X400B-5,5S M5M46X400B-6,6S M5M46X800B-5,5S M5M46X800B-6,6S M5M465160B-5,5S M5M465160B-6,6S Min tWC tRAS tCAS tCSH tRSH tWCS tWCH tCWL tRWL tWP tDS tDH tOEH Write cycle time RAS low pulse width CAS low pulse width CAS hold time after RAS low RAS hold time after CAS low Write setup time before CAS low Write hold time after CAS low CAS hold time after W low RAS hold time after W low Write pulse width Data setup time before CAS low or W low Data hold time after CAS low or W low OE hold time after W low (Note 23) 90 50 13 50 13 0 8 13 13 8 0 8 13 10000 10000 Max Min 110 60 15 60 15 0 10 15 15 10 0 10 15 10000 10000 Max ns ns ns ns ns ns ns ns ns ns ns ns ns
Symbol
Parameter
Unit
Read-Write and Read-Modify-Write Cycles
Limits Symbol Parameter M5M46X400B-5,5S M5M46X400B-6,6S M5M46X800B-5,5S M5M46X800B-6,6S M5M465160B-5,5S M5M465160B-6,6S Min tRWC tRAS tCAS tCSH tRSH tRCS tCWD tRWD tAWD tCWL tRWL tWP tDS tDH tOEH Read write/read modify write cycle time RAS low pulse width CAS low pulse width CAS hold time after RAS low RAS hold time after CAS low Read setup time before CAS low Delay time, CAS low to W low Delay time, RAS low to W low Delay time, address to W low CAS hold time after W low RAS hold time after W low Write pulse width Data setup time before CAS low or W low Data hold time after CAS low or W low OE hold time after W low (Note23) (Note23) (Note23) (Note22) 126 85 50 85 50 0 30 65 40 13 13 8 0 8 13 10000 10000 Max Min 150 95 50 95 50 0 30 75 45 15 15 10 0 10 15 10000 10000 Max ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns Unit
Note 22: tRWC is specified as tRWC(min)=tRAC(max)+tODD(min)+tRWL(min)+tRP(min)+4tT. 23: tWCS, tCWD, tRWD and tAWD and, tCPWD are specified as reference points only. If tWCS tWCS(min) the cycle is an early write cycle and the DQ pins will remain high impedance throughout the entire cycle. If tCWD tCWD(min), tRWD tRWD (min), tAWD tAWD(min) and tCPWD tCPWD(min) (for Fast Page mode cycle only), the cycle is a read-modify-write cycle and the DQ will contain the data read from the selected address. If neither of the above condition (delayed write) is satisfied, the DQ (at access time and until CAS or OE goes back to VIH ) is indeterminate.
11
MITSUBISHI ELECTRIC
Jun. 1999
(Rev. 1.1)
MITSUBISHI LSIs
M5M467400/465400BJ,BTP -5,-6,-5S,-6S M5M467800/465800BJ,BTP -5,-6,-5S,-6S M5M465160BJ,BTP -5,-6,-5S,-6S
FAST PAGE MODE 67108864-BIT (16777216-WORD BY 4-BIT) DYNAMIC RAM FAST PAGE MODE 67108864-BIT (8388608-WORD BY 8-BIT) DYNAMIC RAM FAST PAGE MODE 67108864-BIT (4194304-WORD BY 16-BIT) DYNAMIC RAM
Fast-Page Mode Cycle (Read, Early Write, Read-Write, Read-Modify-Write Cycle)
(Note 24)
Symbol
Parameter
Limits M5M46X400B-5,5S M5M46X400B-6,6S M5M46X800B-5,5S M5M46X800B-6,6S M5M465160B-5,5S M5M465160B-6,6S Min Max Min 40 75 125000 12 100 10 35 35 125000 15 Max
Unit
tPC tPRWC tRAS tCP tCPRH tCPWD
Fast page mode read/write cycle time Fast page mode read write/read modify write cycle time RAS low pulse width for read write cycle CAS high pulse width RAS hold time after CAS precharge Delay time, CAS precharge to W low (Note23) (Note25) (Note26)
35 70 85 8 30 30
ns ns ns ns ns ns
Note 24: All previously specified timing requirements and switching characteristics are applicable to their respective Fast page mode cycle. 25: tRAS(min) is specified as two cycles of CAS input are performed. 26: tCP(max) is specified as a reference point only. If tCP tCP(max) , access time is controlled exclusively by tCAC.
CAS before RAS Refresh Cycle
(Note 27) Limits M5M46X400B-5,5S M5M46X400B-6,6S M5M46X800B-5,5S M5M46X800B-6,6S Unit M5M465160B-5,5S M5M465160B-6,6S Min Max Min 5 10 10 10 Max ns ns ns ns 5 10 10 10
Symbol
Parameter
tCSR tCHR tRSR tRHR
CAS setup time before RAS low CAS hold time after RAS low Read setup time before RAS low Read hold time after RAS low
Note 27: Eight or more CAS before RAS cycles instead of eight RAS cycles are necessary for proper operation of CAS before RAS refresh mode.
12
MITSUBISHI ELECTRIC
Jun. 1999
(Rev. 1.1)
MITSUBISHI LSIs
M5M467400/465400BJ,BTP -5,-6,-5S,-6S M5M467800/465800BJ,BTP -5,-6,-5S,-6S M5M465160BJ,BTP -5,-6,-5S,-6S
FAST PAGE MODE 67108864-BIT (16777216-WORD BY 4-BIT) DYNAMIC RAM FAST PAGE MODE 67108864-BIT (8388608-WORD BY 8-BIT) DYNAMIC RAM FAST PAGE MODE 67108864-BIT (4194304-WORD BY 16-BIT) DYNAMIC RAM
SELF REFRESH SPECIFICATIONS
Self refresh devices are denoted by "S" after speed item, like -5S / -6S . The other characteristics and requirements than the below are same as normal devices.
ELECTRICAL CHARACTERISTICS
Symbol Parameter
(Ta=0 ~ 70 C , Vcc=3.3V
0.3V, Vss=0V, unless
otherwise noted) (Note 2) Limits Typ Unit
Test conditions
CAS before RAS refresh cycling input high level Vcc-0.2V input low level 0.2V output = OPEN , tRC = 31.25s tRAS = tRAS(min) ~ 300ns
Min
Max
ICC8 (AV)
Average supply current M5M46X400B-5S,6S from Vcc M5M46X800B-5S,6S Extended - Refresh cycle M5M465160B-5S,6S (note 5,6) Average supply current from Vcc Self - Refresh cycle (note 6)
500
A
ICC9 (AV)
M5M46X400B-5S,6S M5M46X800B-5S,6S M5M465160B-5S,6S
RAS = CAS
0.2V
output = OPEN
400
A
TIMING REQUIREMENTS
(Ta=0 ~ 70 C, Vcc=3.3V
0.3V, Vss=0V, unless
Limits
otherwise noted See notes 13,14)
Symbol
Parameter
M5M46X400B-5S M5M46X400B-6S M5M46X800B-5S M5M46X800B-6S M5M465160B-5S M5M465160B-6S Min Max Min 100 110 - 50 Max 100 90 - 50
Unit
tRASS tRPS tCHS
Self Refresh RAS low pulse width Self Refresh RAS high precharge time Self Refresh CAS hold time
S
ns ns
SELF REFRESH ENTRY & EXIT CONDITIONS
(1) In case of CBR distributed refresh The last / first full refresh cycles must be made within on the condition of tNS 128 ms and tSN 128 ms. tNS
Self refresh period
DISTRIBUTED REFRESH < 128 ms > DISTRIBUTED REFRESH < 128 ms >
tNS / tSN before / after self refresh ,
tSN
(2) In case of burst refresh The last / first full refresh cycles must be made within tNS / tSN before / after self refresh , on the condition of tNS 16 ms and tSN 16 ms. tNS
Self refresh period
BURST REFRESH < 128 ms > BURST REFRESH < 128 ms >
tSN
13
MITSUBISHI ELECTRIC
Jun. 1999
(Rev. 1.1)
MITSUBISHI LSIs
M5M467400/465400BJ,BTP -5,-6,-5S,-6S M5M467800/465800BJ,BTP -5,-6,-5S,-6S M5M465160BJ,BTP -5,-6,-5S,-6S
FAST PAGE MODE 67108864-BIT (16777216-WORD BY 4-BIT) DYNAMIC RAM FAST PAGE MODE 67108864-BIT (8388608-WORD BY 8-BIT) DYNAMIC RAM FAST PAGE MODE 67108864-BIT (4194304-WORD BY 16-BIT) DYNAMIC RAM
Timing Diagrams Read Cycle
(Note 28)
tRC tRAS VIH RAS VIL tCSH tCRP CAS LCAS / UCAS VIH VIL tASR VIH tRAD tRAH tASC
COLUMN ADDRESS ROW ADDRESS
tRP tRSH tRPC tCRP
tRCD tCAS tCPN tCAH tRAL tASR
(at M5M465160Bxx only)
Address
VIL
ROW ADDRESS
tRCS W VIH VIL
tRRH tRCH
tDZC DQ1 ~ DQ4 (8,16) (INPUTS) VIH VIL tAA tCLZ VOH DQ1 ~ DQ4 (8,16) (OUTPUTS) VOL
Hi-Z DATA VALID Hi-Z
tCDD
tCAC tOFF
Hi-Z
tRAC tDZO VIH OE VIL tOEA tOCH tORH
tOEZ tODD
Note 28:
Indicates the don't care input. VIH(min) VIN VIH(max) or VIL(min)
VIN VIL(max)
Indicates the invalid output.
Indicates the skew of the two inputs. (at M5M465160xx only)
14
MITSUBISHI ELECTRIC
Jun. 1999
(Rev. 1.1)
MITSUBISHI LSIs
M5M467400/465400BJ,BTP -5,-6,-5S,-6S M5M467800/465800BJ,BTP -5,-6,-5S,-6S M5M465160BJ,BTP -5,-6,-5S,-6S
FAST PAGE MODE 67108864-BIT (16777216-WORD BY 4-BIT) DYNAMIC RAM FAST PAGE MODE 67108864-BIT (8388608-WORD BY 8-BIT) DYNAMIC RAM FAST PAGE MODE 67108864-BIT (4194304-WORD BY 16-BIT) DYNAMIC RAM
Write Cycle (Early Write)
tWC tRAS VIH RAS VIL tCSH tCRP CAS LCAS / UCAS VIH VIL tASR tRAH tASC
COLUMN ADDRESS
tRP
tRPC tRSH tCAS tCRP
tRCD
(at M5M465160Bxx only)
tCAH
tASR
ROW ADDRESS
Address
VIH VIL
ROW ADDRESS
tWCS VIH W VIL tDS VIH DQ1 ~ DQ4 (8,16) (INPUTS) VIL
tWCH
tDH
DATA VALID
VOH DQ1 ~ DQ4 (8,16) (OUTPUTS) VOL
Hi-Z
VIH OE VIL
15
MITSUBISHI ELECTRIC
Jun. 1999
(Rev. 1.1)
MITSUBISHI LSIs
M5M467400/465400BJ,BTP -5,-6,-5S,-6S M5M467800/465800BJ,BTP -5,-6,-5S,-6S M5M465160BJ,BTP -5,-6,-5S,-6S
FAST PAGE MODE 67108864-BIT (16777216-WORD BY 4-BIT) DYNAMIC RAM FAST PAGE MODE 67108864-BIT (8388608-WORD BY 8-BIT) DYNAMIC RAM FAST PAGE MODE 67108864-BIT (4194304-WORD BY 16-BIT) DYNAMIC RAM
Write Cycle (Delayed Write)
tWC tRAS VIH RAS VIL tCSH tCRP VIH VIL tASR tRAH tASC tCAH
COLUMN ADDRESS
tRP
tRPC tRSH tCAS tCRP
tRCD
CAS LCAS / UCAS
(at M5M465160Bxx only)
tASR
ROW ADDRESS
Address
VIH VIL
ROW ADDRESS
tCWL tRWL VIH W VIL tRCS tDZC VIH DQ1 ~ DQ4 (8,16) (INPUTS) VIL
Hi-Z
tWP tWCH tDS tDH
DATA VALID
tCLZ VOH DQ1 ~ DQ4 (8,16) (OUTPUTS) VOL tDZO
Hi-Z
tOEZ tODD VIH OE VIL tOEH
16
MITSUBISHI ELECTRIC
Jun. 1999
(Rev. 1.1)
MITSUBISHI LSIs
M5M467400/465400BJ,BTP -5,-6,-5S,-6S M5M467800/465800BJ,BTP -5,-6,-5S,-6S M5M465160BJ,BTP -5,-6,-5S,-6S
FAST PAGE MODE 67108864-BIT (16777216-WORD BY 4-BIT) DYNAMIC RAM FAST PAGE MODE 67108864-BIT (8388608-WORD BY 8-BIT) DYNAMIC RAM FAST PAGE MODE 67108864-BIT (4194304-WORD BY 16-BIT) DYNAMIC RAM
Read-Write, Read-Modify-Write Cycle
tRWC tRAS RAS VIH VIL tCSH tCRP CAS LCAS / UCAS VIH VIL tRAD tASR tRAH tASC tCAH
COLUMN ADDRESS
tRP
tRPC tRSH tCAS tCRP
tRCD
(at M5M465160Bxx only)
tASR
ROW ADDRESS
Address
VIH VIL
ROW ADDRESS
tCWD tAWD tRWD VIH W VIL tRAC tDZC tAA DQ1 ~ DQ4 (8,16) (INPUTS) VIH VIL tCLZ VOH DQ1 ~ DQ4 (8,16) (OUTPUTS) VOL
Hi-Z Hi-Z
tCWL tRWL
tRCS tWP tCAC tDS tDH
DATA VALID
DATA VALID
Hi-Z
tOEA tDZO VIH VIL tODD tOEZ OE tOEH
17
MITSUBISHI ELECTRIC
Jun. 1999
(Rev. 1.1)
MITSUBISHI LSIs
M5M467400/465400BJ,BTP -5,-6,-5S,-6S M5M467800/465800BJ,BTP -5,-6,-5S,-6S M5M465160BJ,BTP -5,-6,-5S,-6S
FAST PAGE MODE 67108864-BIT (16777216-WORD BY 4-BIT) DYNAMIC RAM FAST PAGE MODE 67108864-BIT (8388608-WORD BY 8-BIT) DYNAMIC RAM FAST PAGE MODE 67108864-BIT (4194304-WORD BY 16-BIT) DYNAMIC RAM
Fast Page Mode Read Cycle
tRAS tCSH VIH RAS VIL tRPC tCRP CAS VIH tRCD tCAS tCP tCAS tCP tCAS tPC tCPRH tRSH
tRP
tCRP
LCAS / UCAS VIL
(at M5M465160Bxx only)
tRAD tASR tRAH tASC tCAH tASC tCAH
COLUMN ADDRESS-2
tRAL tASC tCAH tASR
ROW ADDRESS
Address
VIH VIL
ROW ADDRESS
COLUMN ADDRESS-1
COLUMN ADDRESS-3
tAA tRCS W VIH tRCH tRCS tRCH tRCS
tAA
tRRH
tRCH VIL
tDZC DQ1 ~ DQ4 (8,16) (INPUTS) VIL VIH tCDD tDZC
Hi-Z
tCDD
tDZC
tCDD
tCAC VOH DQ1 ~ DQ4 (8,16) (OUTPUTS) VOL tCLZ
Hi-Z
tCAC tOFF
DATA VALID-1
tCAC tOFF
DATA VALID-2
tOFF
DATA VALID-3
tCLZ
tCLZ
tAA tRAC tOEZ tDZO VIH OE VIL tOEA tOCH tODD
tCPA tOEZ tDZO tOEA tOCH tODD
tCPA tORH tDZO tOEA tOCH tOEZ tODD
18
MITSUBISHI ELECTRIC
Jun. 1999
(Rev. 1.1)
MITSUBISHI LSIs
M5M467400/465400BJ,BTP -5,-6,-5S,-6S M5M467800/465800BJ,BTP -5,-6,-5S,-6S M5M465160BJ,BTP -5,-6,-5S,-6S
FAST PAGE MODE 67108864-BIT (16777216-WORD BY 4-BIT) DYNAMIC RAM FAST PAGE MODE 67108864-BIT (8388608-WORD BY 8-BIT) DYNAMIC RAM FAST PAGE MODE 67108864-BIT (4194304-WORD BY 16-BIT) DYNAMIC RAM
Fast Page Mode Write Cycle (Early Write)
tRAS tCSH VIH RAS VIL tCRP CAS VIH tRCD tCAS tCP tCAS tCP tCAS tPC tRSH tRPC tCRP tRP
LCAS / UCAS VIL
(at M5M465160Bxx only)
tASR VIH VIL
tRAH
tASC
tCAH
tASC
tCAH
COLUMN ADDRESS-2
tASC
tCAH
COLUMN ADDRESS-3
tASR
ROW ADDRESS
Address
ROW ADDRESS
COLUMN ADDRESS-1
VIH W VIL
tWCS
tWCH
tWCS
tWCH
tWCS
tWCH
tDS VIH DQ1 ~ DQ4 (8,16) (INPUTS) VIL
tDH
tDS
tDH
tDS
tDH
DATA VALID-1
DATA VALID-2
DATA VALID-3
VOH DQ1 ~ DQ4 (8,16) (OUTPUTS) VOL
Hi-Z
VIH OE VIL
19
MITSUBISHI ELECTRIC
Jun. 1999
(Rev. 1.1)
MITSUBISHI LSIs
M5M467400/465400BJ,BTP -5,-6,-5S,-6S M5M467800/465800BJ,BTP -5,-6,-5S,-6S M5M465160BJ,BTP -5,-6,-5S,-6S
FAST PAGE MODE 67108864-BIT (16777216-WORD BY 4-BIT) DYNAMIC RAM FAST PAGE MODE 67108864-BIT (8388608-WORD BY 8-BIT) DYNAMIC RAM FAST PAGE MODE 67108864-BIT (4194304-WORD BY 16-BIT) DYNAMIC RAM
Fast Page Mode Write Cycle (Delayed Write)
tRSH tRAS tCSH RAS VIH VIL tRPC tCRP CAS VIH tRAD tASR VIH VIL tRAH tASC tCAH tASC tCAH tRWL tASR
ROW ADDRESS
tRP tPC
tRCD
tCAS
tCP
tCAS
tCRP
LCAS / UCAS VIL
(at M5M465160Bxx only)
Address
ROW ADDRESS
COLUMN ADDRESS-1
COLUMN ADDRESS-2
tRCS VIH W VIL
tWCH tCWL tWP
tRCS
tWCH tCWL tWP
tDZC VIH DQ1 ~ DQ4 (8,16) (INPUTS) VIL tCLZ DQ1 ~ DQ4 (8,16) (OUTPUTS) VOL VOH
tDS
tDH
DATA VALID-1
tDZC
tDS
tDH
DATA VALID-2
tDZO tCLZ
Hi-Z
tOEZ tDZO VIH OE VIL tODD tOEH
tOEZ tOEH tODD
20
MITSUBISHI ELECTRIC
Jun. 1999
(Rev. 1.1)
MITSUBISHI LSIs
M5M467400/465400BJ,BTP -5,-6,-5S,-6S M5M467800/465800BJ,BTP -5,-6,-5S,-6S M5M465160BJ,BTP -5,-6,-5S,-6S
FAST PAGE MODE 67108864-BIT (16777216-WORD BY 4-BIT) DYNAMIC RAM FAST PAGE MODE 67108864-BIT (8388608-WORD BY 8-BIT) DYNAMIC RAM FAST PAGE MODE 67108864-BIT (4194304-WORD BY 16-BIT) DYNAMIC RAM
Fast Page Mode Read-Write, Read-Modify-Write Cycle
tRAS VIH RAS VIL tPRWC tCRP CAS VIH tRAD tASR tRAH tASC tCAH tASC tCAH tRWL tRCD tCAS tCP tCAS tCSH tRSH
tRP
tRPC
tCRP
VIL LCAS / UCAS
(at M5M465160Bxx only)
tASR
ROW ADDRESS
Address
VIH VIL
ROW ADDRESS
COLUMN ADDRESS-1
COLUMN ADDRESS-2
tRWD tRCS VIH W VIL tRAC tAA tDZC DQ1 ~ DQ4 (INPUTS) VIH VIL tCLZ DQ1 ~ DQ4 VOH (OUTPUTS) VOL tDZO VIH VIL
(8,16) DATA VALID-1 (8,16)
tWCH tAWD tCWD
tRCS tCWL tWP tCPA tAA tAWD
tWCH tCWL tWP
tCWD tCPWD
tCAC
tDS
tDH
tDZC
tDS
tDH
DATA VALID-2
DATA VALID-1
tCAC tDZO tCLZ
Hi-Z
DATA VALID-2
tOEA tOEZ tODD tOEH
tOEA tOEZ tODD
tOEH
OE
21
MITSUBISHI ELECTRIC
Jun. 1999
(Rev. 1.1)
MITSUBISHI LSIs
M5M467400/465400BJ,BTP -5,-6,-5S,-6S M5M467800/465800BJ,BTP -5,-6,-5S,-6S M5M465160BJ,BTP -5,-6,-5S,-6S
FAST PAGE MODE 67108864-BIT (16777216-WORD BY 4-BIT) DYNAMIC RAM FAST PAGE MODE 67108864-BIT (8388608-WORD BY 8-BIT) DYNAMIC RAM FAST PAGE MODE 67108864-BIT (4194304-WORD BY 16-BIT) DYNAMIC RAM
RAS-only Refresh Cycle
tRC tRAS VIH RAS VIL tRP tCRP CAS LCAS / UCAS
(at M5M465160Bxx only)
tRPC
tCRP
VIH VIL
tASR
tRAH
tASR
ROW ADDRESS
Address
VIH VIL
ROW ADDRESS
W
VIH VIL
DQ1 ~ DQ4 (8,16) VIH (INPUTS) VIL
VOH DQ1 ~ DQ4 (8,16) (OUTPUTS) VOL VIH OE VIL
Hi-Z
22
MITSUBISHI ELECTRIC
Jun. 1999
(Rev. 1.1)
MITSUBISHI LSIs
M5M467400/465400BJ,BTP -5,-6,-5S,-6S M5M467800/465800BJ,BTP -5,-6,-5S,-6S M5M465160BJ,BTP -5,-6,-5S,-6S
FAST PAGE MODE 67108864-BIT (16777216-WORD BY 4-BIT) DYNAMIC RAM FAST PAGE MODE 67108864-BIT (8388608-WORD BY 8-BIT) DYNAMIC RAM FAST PAGE MODE 67108864-BIT (4194304-WORD BY 16-BIT) DYNAMIC RAM
CAS before RAS Refresh Cycle
tRC tRP RAS VIH VIL tRPC tCPN CAS VIH tCSR tCHR tRPC tCSR tCHR tRAS tRAS
tRC tRP
tRPC
tCRP
LCAS / UCAS VIL
(at M5M465160Bxx only)
tASR
Address
VIH VIL
ROW ADDRESS
tRCH W VIH VIL
tRSR
tRHR
tRSR
tRHR
tRCS
tOFF tCDD DQ1 ~ DQ4 (8,16) (INPUTS) VIH VIL
DQ1 ~ DQ4 (8,16) (OUTPUTS)
VOH VOL tOEZ tODD VIH
Hi-Z
OE VIL
23
MITSUBISHI ELECTRIC
Jun. 1999
(Rev. 1.1)
MITSUBISHI LSIs
M5M467400/465400BJ,BTP -5,-6,-5S,-6S M5M467800/465800BJ,BTP -5,-6,-5S,-6S M5M465160BJ,BTP -5,-6,-5S,-6S
FAST PAGE MODE 67108864-BIT (16777216-WORD BY 4-BIT) DYNAMIC RAM FAST PAGE MODE 67108864-BIT (8388608-WORD BY 8-BIT) DYNAMIC RAM FAST PAGE MODE 67108864-BIT (4194304-WORD BY 16-BIT) DYNAMIC RAM
Hidden Refresh Cycle (Read)
(Note 29)
tRC tRAS VIH RAS VIL tCRP CAS VIH tRAD tASR VIH VIL tRAH tASC tCAH
COLUMN ADDRESS
tRC tRP tRAS tRP
tRPC tRCD tRSH tCHR tCRP
LCAS / UCAS VIL
(at M5M465160Bxx only)
tASR
ROW ADDRESS
Address
ROW ADDRESS
tRAL tRCS VIH W VIL tDZC
tRRH tRSR tRHR
tCDD DQ1 ~ DQ4 (8,16) (INPUTS) VIH VIL tRAC tCLZ DQ1 ~ DQ4 (8,16) (OUTPUTS) VOH VOL tOEZ tDZO VIH OE VIL tOEA tORH tODD
Hi-Z DATA VALID Hi-Z Hi-Z
tAA tCAC tOFF
Note 29: Early write, delayed write, read write or read modify write cycle is applicable instead of read cycle. Timing requirements and output state are the same as that of each cycle shown above.
24
MITSUBISHI ELECTRIC
Jun. 1999
(Rev. 1.1)
MITSUBISHI LSIs
M5M467400/465400BJ,BTP -5,-6,-5S,-6S M5M467800/465800BJ,BTP -5,-6,-5S,-6S M5M465160BJ,BTP -5,-6,-5S,-6S
FAST PAGE MODE 67108864-BIT (16777216-WORD BY 4-BIT) DYNAMIC RAM FAST PAGE MODE 67108864-BIT (8388608-WORD BY 8-BIT) DYNAMIC RAM FAST PAGE MODE 67108864-BIT (4194304-WORD BY 16-BIT) DYNAMIC RAM
Self Refresh Cycle
tRP VIH RAS VIL
tRASS
tRPS
tRPC tRPC tCSR CAS VIH tCHS tCRP
LCAS / UCAS VIL
(at M5M465160Bxx only)
tCPN tASR
Address
VIH VIL tRSR
ROW ADDRESS
tRCH W VIH VIL
tRHR
DQ1 ~ DQ4 (8,16) (INPUTS)
VIH VIL tOFF
DQ1 ~ DQ4 (8,16) (OUTPUTS) VOL
VOH
Hi-Z
tOEZ OE VIH VIL
25
MITSUBISHI ELECTRIC
Jun. 1999
(Rev. 1.1)
MITSUBISHI LSIs
M5M467400/465400BJ,BTP -5,-6,-5S,-6S M5M467800/465800BJ,BTP -5,-6,-5S,-6S M5M465160BJ,BTP -5,-6,-5S,-6S
FAST PAGE MODE 67108864-BIT (16777216-WORD BY 4-BIT) DYNAMIC RAM FAST PAGE MODE 67108864-BIT (8388608-WORD BY 8-BIT) DYNAMIC RAM FAST PAGE MODE 67108864-BIT (4194304-WORD BY 16-BIT) DYNAMIC RAM
Upper / (Lower) Byte Read Cycle (at M5M465160Bxx only)
tRC tRAS VIH RAS VIL tCSH tCRP UCAS (or LCAS) VIH VIL tCRP LCAS (or UCAS) VIH tRAD VIL tASR tRAH tASC
COLUMN ADDRESS
tRP tRSH
tRPC tCAS tCPN
tCRP
tRCD
tCAH tRAL
tRPC
tCRP
tASR
ROW ADDRESS
Address
VIH VIL
ROW ADDRESS
tRRH tRCS VIH W VIL tRCH
VIH DQ1 ~ DQ8 (or DQ9 ~ DQ16) (INPUTS) VIL
DQ1 ~ DQ8 VOH (or DQ9 ~ DQ16) (OUTPUTS) VOL tDZC VIH DQ9 ~ DQ16 (or DQ1 ~ DQ8) (INPUTS) VIL
Hi-Z
tCAC
Hi-Z
tCDD
tAA tCLZ
tOFF
VOH DQ9 ~ DQ16 (or DQ1 ~ DQ8) (OUTPUTS) VOL
Hi-Z
DATA VALID
tRAC tDZO tOEA tOCH
tOEZ tODD
VIH OE VIL
tORH
26
MITSUBISHI ELECTRIC
Jun. 1999
(Rev. 1.1)
MITSUBISHI LSIs
M5M467400/465400BJ,BTP -5,-6,-5S,-6S M5M467800/465800BJ,BTP -5,-6,-5S,-6S M5M465160BJ,BTP -5,-6,-5S,-6S
FAST PAGE MODE 67108864-BIT (16777216-WORD BY 4-BIT) DYNAMIC RAM FAST PAGE MODE 67108864-BIT (8388608-WORD BY 8-BIT) DYNAMIC RAM FAST PAGE MODE 67108864-BIT (4194304-WORD BY 16-BIT) DYNAMIC RAM
Upper / (Lower) Byte Write Cycle (Early Write) (at M5M465160Bxx only)
tWC tRAS VIH RAS VIL tCSH tCRP UCAS (or LCAS) VIH VIL tCRP LCAS (or UCAS) VIH VIL tASR tRAH tASC tCAH
COLUMN ADDRESS
tRP
tRCD tCAS
tRSH
tRPC
tCRP
tRPC
tCRP
tASR
ROW ADDRESS
Address
VIH VIL
ROW ADDRESS
tWCS W VIH VIL
tWCH
DQ1 ~ DQ8 VIH (or DQ9 ~ DQ16) (INPUTS) VIL
DQ1 ~ DQ8 VOH (or DQ9 ~ DQ16) (OUTPUTS) VOL tDS DQ9 ~ DQ16 VIH (or DQ1 ~ DQ8) (INPUTS) VIL tDH
DATA VALID
Hi-Z
DQ9 ~ DQ16 VOH (or DQ1 ~ DQ8) (OUTPUTS) VOL VIH OE VIL
Hi-Z
27
MITSUBISHI ELECTRIC
Jun. 1999
(Rev. 1.1)
MITSUBISHI LSIs
M5M467400/465400BJ,BTP -5,-6,-5S,-6S M5M467800/465800BJ,BTP -5,-6,-5S,-6S M5M465160BJ,BTP -5,-6,-5S,-6S
FAST PAGE MODE 67108864-BIT (16777216-WORD BY 4-BIT) DYNAMIC RAM FAST PAGE MODE 67108864-BIT (8388608-WORD BY 8-BIT) DYNAMIC RAM FAST PAGE MODE 67108864-BIT (4194304-WORD BY 16-BIT) DYNAMIC RAM
Upper / (Lower) Byte Write Cycle (Delayed Write) (at M5M465160Bxx only)
tWC tRAS VIH RAS VIL tCSH tCRP VIH VIL tRPC tCRP VIH VIL tASR tRAH tASC tCAH
COLUMN ADDRESS
tRP
tRCD tCAS
tRSH
tRPC
tCRP
UCAS (or LCAS)
tCRP
LCAS (or UCAS)
tASR
ROW ADDRESS
Address
VIH VIL
ROW ADDRESS
tCWL tRWL VIH W VIL tRCS tWCH tWP
DQ1 ~ DQ8 VIH (or DQ9 ~ DQ16) (INPUTS) VIL
DQ1 ~ DQ8 VOH (or DQ9 ~ DQ16) (OUTPUTS) VOL tDZC VIH DQ9 ~ DQ16 (or DQ1 ~ DQ8) (INPUTS) VIL
Hi-Z
Hi-Z
tDS
tDH
DATA VALID
tCLZ DQ9 ~ DQ16 VOH (or DQ1 ~ DQ8) (OUTPUTS) VOL tOEZ tDZO tODD VIH OE VIL tOEH
Hi-Z
28
MITSUBISHI ELECTRIC
Jun. 1999
(Rev. 1.1)
MITSUBISHI LSIs
M5M467400/465400BJ,BTP -5,-6,-5S,-6S M5M467800/465800BJ,BTP -5,-6,-5S,-6S M5M465160BJ,BTP -5,-6,-5S,-6S
FAST PAGE MODE 67108864-BIT (16777216-WORD BY 4-BIT) DYNAMIC RAM FAST PAGE MODE 67108864-BIT (8388608-WORD BY 8-BIT) DYNAMIC RAM FAST PAGE MODE 67108864-BIT (4194304-WORD BY 16-BIT) DYNAMIC RAM
Upper/(Lower) Byte Read-Write, Upper/(Lower) Byte Read-Modify-Write Cycle (at M5M465160Bxx only)
tRWC tRAS VIH RAS VIL tCSH tRPC tCRP VIH VIL tCRP LCAS (or UCAS) VIH VIL tASR tRAH tASC tASR
ROW ADDRESS
tRP
tRCD tCAS
tRSH
tCRP
UCAS (or LCAS)
tRPC
tCRP
tCAH
COLUMN ADDRESS
Address
VIH VIL
ROW ADDRESS
tCWD tAWD tRWD W VIH VIL tRCS DQ1 ~ DQ8 VIH (or DQ9 ~ DQ16) (INPUTS) VIL tRAC VOH DQ1 ~ DQ8 (or DQ9 ~ DQ16) VOL (OUTPUTS)
Hi-Z
tCWL tRWL
tWP
tDZC tAA tDS tDH
DATA VALID
VIH DQ9 ~ DQ16 (or DQ1 ~ DQ8) (INPUTS) VIL
Hi-Z
tCAC tCLZ
DQ9 ~ DQ16 (or DQ1 ~ DQ8) (OUTPUTS)
VOH VOL
Hi-Z
DATA VALID
Hi-Z
tOEA tDZO tOEZ tOEH tODD
VIH OE VIL
29
MITSUBISHI ELECTRIC
Jun. 1999
(Rev. 1.1)
MITSUBISHI LSIs
M5M467400/465400BJ,BTP -5,-6,-5S,-6S M5M467800/465800BJ,BTP -5,-6,-5S,-6S M5M465160BJ,BTP -5,-6,-5S,-6S
FAST PAGE MODE 67108864-BIT (16777216-WORD BY 4-BIT) DYNAMIC RAM FAST PAGE MODE 67108864-BIT (8388608-WORD BY 8-BIT) DYNAMIC RAM FAST PAGE MODE 67108864-BIT (4194304-WORD BY 16-BIT) DYNAMIC RAM
Fast Page Mode Upper / (Lower) Byte Read Cycle (at M5M465160Bxx only)
tCSH VIH RAS VIL tRPC tCRP UCAS (or LCAS) VIH VIL tCRP LCAS (or UCAS) VIH VIL tRAD tASR VIH VIL tRAH tASC tCAH tASC tCAH
COLUMN ADDRESS-2
tRAS tCPRH tPC tRSH
tRP
tRCD
tCAS
tCP
tCAS
tCP
tCAS
tCRP
tRPC
tCRP
tRAL tASC tCAH tASR
ROW ADDRESS
Address
ROW ADDRESS
COLUMN ADDRESS-1
COLUMN ADDRESS-3
tRRH tAA tRCS W VIH tRCH VIL VIH DQ1 ~ DQ8 (or DQ9 ~ DQ16) (INPUTS) VIL DQ1 ~ DQ8 VOH (or DQ9 ~ DQ16) (OUTPUTS) VOL tDZC DQ9 ~ DQ16 VIH (or DQ1 ~ DQ8) (INPUTS) VIL tCAC DQ9 ~ DQ16 VOH (or DQ1 ~ DQ8) (OUTPUTS) VOL tCLZ
Hi-Z DATA VALID-1 Hi-Z
tAA tRCH tRCS
tRCH
tRCS
tCDD tDZC
Hi-Z
tDZC tCDD tCDD
tOFF
tCAC tCLZ tOFF tCLZ
DATA VALID-2
tCAC
tOFF
DATA VALID-3
tAA tRAC tDZO VIH OE VIL tOEA tOCH tODD tOEZ
tCPA tDZO tOEZ tOEA tOCH tODD
tCPA tDZO
tORH tOEA tOEZ tODD tOCH
30
MITSUBISHI ELECTRIC
Jun. 1999
(Rev. 1.1)
MITSUBISHI LSIs
M5M467400/465400BJ,BTP -5,-6,-5S,-6S M5M467800/465800BJ,BTP -5,-6,-5S,-6S M5M465160BJ,BTP -5,-6,-5S,-6S
FAST PAGE MODE 67108864-BIT (16777216-WORD BY 4-BIT) DYNAMIC RAM FAST PAGE MODE 67108864-BIT (8388608-WORD BY 8-BIT) DYNAMIC RAM FAST PAGE MODE 67108864-BIT (4194304-WORD BY 16-BIT) DYNAMIC RAM
Fast Page Mode Upper / (Lower) Byte Write Cycle (Early Write) (at M5M465160Bxx only)
tRAS tRP tCSH VIH RAS VIL tCRP VIH VIL tCRP VIH VIL tASR tRAH tASC tCAH tASC tRPC tCRP tRCD tCAS tCP tCAS tCP tCAS tRPC tCRP tPC tRSH
UCAS (or LCAS)
LCAS (or UCAS)
tCAH
tASC
tCAH
COLUMN ADDRESS-3
tASR
ROW ADDRESS
Address
VIH VIL
ROW ADDRESS
COLUMN ADDRESS-1
COLUMN ADDRESS-2
W
VIH VIL
tWCS
tWCH
tWCS
tWCH
tWCS
tWCH
DQ1 ~ DQ8 VIH (or DQ9 ~ DQ16) (INPUTS) VIL
VOH DQ1 ~ DQ8 (or DQ9 ~ DQ16) (OUTPUTS) VOL tDS VIH DQ9 ~ DQ16 (or DQ1 ~ DQ8) VIL (INPUTS) tDH
Hi-Z
tDS
tDH
tDS
tDH
DATA VALID-1
DATA VALID-2
DATA VALID-3
DQ9 ~ DQ16 VOH (or DQ1 ~ DQ8) (OUTPUTS) VOL VIH OE VIL
Hi-Z
31
MITSUBISHI ELECTRIC
Jun. 1999
(Rev. 1.1)
MITSUBISHI LSIs
M5M467400/465400BJ,BTP -5,-6,-5S,-6S M5M467800/465800BJ,BTP -5,-6,-5S,-6S M5M465160BJ,BTP -5,-6,-5S,-6S
FAST PAGE MODE 67108864-BIT (16777216-WORD BY 4-BIT) DYNAMIC RAM FAST PAGE MODE 67108864-BIT (8388608-WORD BY 8-BIT) DYNAMIC RAM FAST PAGE MODE 67108864-BIT (4194304-WORD BY 16-BIT) DYNAMIC RAM
Fast Page Mode Upper / (Lower) Byte Write Cycle (Delayed Write) (at M5M465160Bxx only)
tRSH tRAS tCSH VIH RAS VIL tRPC tCRP UCAS (or LCAS) VIH VIL tRPC tCRP LCAS (or UCAS) VIH VIL tRAD tASR VIH VIL tRAH tASC tCAH tASC tCAH tRWL tASR
ROW ADDRESS
tPC
tRP
tRCD
tCAS
tCP
tCAS
tCRP
tCRP
Address
ROW ADDRESS
COLUMN ADDRESS-1
COLUMN ADDRESS-2
tRCS VIH VIL
tWCH tCWL
tRCS
tWCH tCWL tWP
W
tWP
DQ1 ~ DQ8 VIH (or DQ9 ~ DQ16) (INPUTS) VIL DQ1 ~ DQ8 VOH (or DQ9 ~ DQ16) (OUTPUTS) VOL tDS
Hi-Z
tDZC VIH DQ9 ~ DQ16 (or DQ1 ~ DQ8) (INPUTS) VIL tDZO tCLZ VOH DQ9 ~ DQ16 (or DQ1 ~ DQ8) (OUTPUTS) VOL tOEZ tODD VIH OE VIL
tDH
tDZC
tDS
tDH
DATA VALID-2
DATA VALID-1
tDZO tCLZ
Hi-Z
tOEZ tOEH tOEH tODD
32
MITSUBISHI ELECTRIC
Jun. 1999
(Rev. 1.1)
MITSUBISHI LSIs
M5M467400/465400BJ,BTP -5,-6,-5S,-6S M5M467800/465800BJ,BTP -5,-6,-5S,-6S M5M465160BJ,BTP -5,-6,-5S,-6S
FAST PAGE MODE 67108864-BIT (16777216-WORD BY 4-BIT) DYNAMIC RAM FAST PAGE MODE 67108864-BIT (8388608-WORD BY 8-BIT) DYNAMIC RAM FAST PAGE MODE 67108864-BIT (4194304-WORD BY 16-BIT) DYNAMIC RAM
Fast Page Mode Upper / (Lower) Byte Read-Write, Upper/(Lower) Byte Read-Modefy-Write Cycle (at M5M465160Bxx only)
tRAS tRP VIH RAS VIL tPRWC tCRP VIH UCAS (or LCAS) VIL tRPC tCRP VIH LCAS (or UCAS) VIL tRAD tASR VIH VIL tRAH tASC tCAH tASC tCAH tRWL tASR
ROW ADDRESS
tCSH
tRSH
tRPC tCRP
tRCD
tCAS
tCP
tCAS
tCRP
Address
ROW ADDRESS
COLUMN ADDRESS-1
COLUMN ADDRESS-2
tRWD tRCS tAWD VIH W VIL tCWD tWCH tCWL tWP tRCS tAWD
tWCH tCWL tWP tCWD tCPWD
VIH DQ1 ~ DQ8 (or DQ9 ~ DQ16) (INPUTS) VIL tCPA DQ1 ~ DQ8 VOH (or DQ9 ~ DQ16) (OUTPUTS) VOL tDZC DQ9 ~ DQ16 VIH (or DQ1 ~ DQ8) (INPUTS) VIL tDZO tCLZ DQ9 ~ DQ16 VOH (or DQ1 ~ DQ8) (OUTPUTS) VOL
DATA VALID-1
Hi-Z
tAA tCAC tDS tDH tDZC
tAA tCAC tDS tDH
DATA VALID-2
tRAC
DATA VALID-1
tDZO tCLZ
Hi-Z
DATA VALID-2
tOEA tOEZ tODD tOEH
tOEA tOEZ tODD tOEH
VIH OE VIL
33
MITSUBISHI ELECTRIC
Jun. 1999
(Rev. 1.1)
MITSUBISHI LSIs
M5M467400/465400BJ,BTP -5,-6,-5S,-6S M5M467800/465800BJ,BTP -5,-6,-5S,-6S M5M465160BJ,BTP -5,-6,-5S,-6S
FAST PAGE MODE 67108864-BIT (16777216-WORD BY 4-BIT) DYNAMIC RAM FAST PAGE MODE 67108864-BIT (8388608-WORD BY 8-BIT) DYNAMIC RAM FAST PAGE MODE 67108864-BIT (4194304-WORD BY 16-BIT) DYNAMIC RAM
Upper / (Lower) CAS before RAS Refresh Cycle (at M5M465160Bxx only)
tRP VIH RAS VIL tRPC tRPC UCAS (or LCAS) VIH VIL tCPN tRPC LCAS (or UCAS) VIH VIL tCRP tRPC tCRP tRPC tCRP tCSR tCHR tRPC tCSR tCHR tCRP tRAS tRC tRAS tRC tRP
tASR
Address
VIH VIL tRCH tRSR tRHR tRSR tRHR
ROW ADDRESS
tRCS
W
VIH VIL tOFF
DQ1 ~ DQ8 VIH (or DQ9 ~ DQ16) (INPUTS) VIL tOEZ DQ1 ~ DQ8 VOH (or DQ9 ~ DQ16) (OUTPUTS) VOL tCDD DQ9 ~ DQ16 VIH (or DQ1 ~ DQ8) (INPUTS) VIL tOEZ VOH DQ9 ~ DQ16 (or DQ1 ~ DQ8) (OUTPUTS) VOL
Hi-Z Hi-Z
tOFF
tODD VIH OE VIL
34
MITSUBISHI ELECTRIC
Jun. 1999
(Rev. 1.1)
MITSUBISHI LSIs
M5M467400/465400BJ,BTP -5,-6,-5S,-6S M5M467800/465800BJ,BTP -5,-6,-5S,-6S M5M465160BJ,BTP -5,-6,-5S,-6S
FAST PAGE MODE 67108864-BIT (16777216-WORD BY 4-BIT) DYNAMIC RAM FAST PAGE MODE 67108864-BIT (8388608-WORD BY 8-BIT) DYNAMIC RAM FAST PAGE MODE 67108864-BIT (4194304-WORD BY 16-BIT) DYNAMIC RAM
Upper / (Lower) Hidden Refresh Cycle (Byte Read) (at M5M465160Bxx only)
tRC tRAS VIH RAS VIL tRCD tCRP UCAS VIH tRSH tCHR tRPC tRPC tCRP tRP tRAS
(Note 29)
tRC tRP
(or LCAS) VIL tCRP LCAS VIH tCRP
(or UCAS) VIL tRAD tASR tRAH tASC tCAH
COLUMN ADDRESS
tASR
ROW ADDRESS
Address
VIH VIL
ROW ADDRESS
tRCS VIH VIL
tRAL
tRRH
tRSR
tRHR
W
DQ1 ~ DQ8 VIH (or DQ9 ~ DQ16) (INPUTS) VIL
DQ1 ~ DQ8 VOH (or DQ9 ~ DQ16) (OUTPUTS) VOL tDZC VIH DQ9 ~ DQ16 (or DQ1 ~ DQ8) (INPUTS) VIL tCLZ VOH DQ9 ~ DQ16 (or DQ1 ~ DQ8) (OUTPUTS) VOL
Hi-Z
Hi-Z
tCDD
Hi-Z
tCAC tOFF
DATA VALID
tAA tRAC tDZO VIH OE VIL tOEA tORH tOEZ tODD
35
MITSUBISHI ELECTRIC
Jun. 1999
(Rev. 1.1)
MITSUBISHI LSIs
M5M467400/465400BJ,BTP -5,-6,-5S,-6S M5M467800/465800BJ,BTP -5,-6,-5S,-6S M5M465160BJ,BTP -5,-6,-5S,-6S
FAST PAGE MODE 67108864-BIT (16777216-WORD BY 4-BIT) DYNAMIC RAM FAST PAGE MODE 67108864-BIT (8388608-WORD BY 8-BIT) DYNAMIC RAM FAST PAGE MODE 67108864-BIT (4194304-WORD BY 16-BIT) DYNAMIC RAM
Byte Self Refresh Cycle (at M5M465160Bxx only)
tRP RAS VIH VIL tRPC tRPC UCAS (or LCAS) VIH VIL tCPN tRPC LCAS (or UCAS) VIH VIL tCRP tRPC tCRP tCSR tCHS tCRP tRASS tRPS
tASR VIH
ROW ADDRESS
Address
VIL tRCH tRSR tRHR
W
VIH VIL A @ A @ A @ A @
Hi-Z
DQ1 ~ DQ8 VIH (or DQ9 ~ DQ16) (INPUTS) VIL tOFF tOHC tREZ tOHR
VOH DQ1 ~ DQ8 (or DQ9 ~ DQ16) (OUTPUTS) VOL tOEZ
tCDD VIH DQ9 ~ DQ16 (or DQ1 ~ DQ8) (INPUTS) VIL tOFF
VOH DQ9 ~ DQ16 (or DQ1 ~ DQ8) (OUTPUTS) VOL tOEZ
Hi-Z
tODD VIH OE VIL
36
MITSUBISHI ELECTRIC
Jun. 1999
(Rev. 1.1)
MITSUBISHI LSIs
M5M467400/465400BJ,BTP -5,-6,-5S,-6S M5M467800/465800BJ,BTP -5,-6,-5S,-6S M5M465160BJ,BTP -5,-6,-5S,-6S
FAST PAGE MODE 67108864-BIT (16777216-WORD BY 4-BIT) DYNAMIC RAM FAST PAGE MODE 67108864-BIT (8388608-WORD BY 8-BIT) DYNAMIC RAM FAST PAGE MODE 67108864-BIT (4194304-WORD BY 16-BIT) DYNAMIC RAM
Keep safety first in your circuit designs!
* Mitsubishi Electric Corporation puts the maximum effort into making semiconductor products better and more reliable,but there is always the possibility that trouble may occur with them. Trouble with semiconductors consideration to safety when making your circuit designs,with appropriate measures such as (i) placement of substitutive, auxiliary circuits,(ii) use of non-flammable material or (iii) prevention against any malfunction or mishap.
Notes regarding these materials
*These materials are intended as a reference to assist our customers in the selection of the Mitsubishi semiconductor product best suited to the customer's application;they do not convey any license under any intellectual property rights,or any other rights,belonging to Mitsubishi Electric Corporation or a third party. *Mitsubishi Electric Corporation assumes no responsibility for any damage,or infringement of any third-party's rights,originating in the use of any product data,diagrams,charts or circuit application examples contained in these materials. * All information contained in these materials,including product data,diagrams and charts, represent information on products at the time of publication of these materials,and are subject to change by Mitsubishi Electric Corporation without notice due to product improvements or other reasons. It is therefore recommended that customers contact Mitsubishi Electric Corporation or an authorized Mitsubishi Semiconductor product distributor for the latest product information before purchasing a product listed herein. * Mitsubishi Electric Corporation semiconductors are not designed or manufactured for use in a device or system that is used under circumstances in which human life is potentially at stake. Please contact Mitsubishi Electric Corporation or an authorized Mitsubishi Semiconductor product distributor when considering the use of a product contained herein for special applications,such as apparatus or systems for transportation,vehicular, medical,aerospace,nuclear,or undersea repeater use. *The prior written approval of Mitsubishi Electric Corporation is necessary to reprint or reproduce in whole or in part these materials. *If these products or technologies are subject the Japanese export control restrictions,they must be exported under a license from the Japanese government and cannot be imported into a country other than the approved destination. Any diversion or reexport contrary to the export control laws and regulations of Japan and/or the country of destination is prohibited. *Please contact Mitsubishi Electric Corporation or an authorized Mitsubishi Semiconductor product distributor for further details on these materials or the products contained therein.
37
MITSUBISHI ELECTRIC
Jun. 1999

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